Noncontact determination of interface trap density for semiconductor-dielectric interface structures

ABSTRACT

Embodiments of the subject method and apparatus relate to a sequence of noncontact Corona-Kelvin Metrology, C-KM, that allows the determination and monitoring of interface properties in dielectric/wide band gap semiconductor structures. The technique involves the incremental application of precise and measured quantities of corona charge, Q C , onto the dielectric surface followed by determination of the contact potential difference, V CPD , as the material structure response. The V-Q characteristics obtained are used to extract the surface barrier, V SB , response related to the applied corona charge. The metrology method presented determines an intersection of the V CPD -Q C  characteristic obtained in the dark with the V OX -Q C  characteristic representing the dielectric response. The specific V SB -Q C  dependence surrounding the reference V FB  value is obtained from this method and allows the noncontact determination of the dielectric interface trap density and its spectrum. Application of embodiments of the subject metrology method to thermal oxide on n-type 4H—SiC demonstrates the modification of the D it  distribution by Fowler-Nordheim stress. In addition, an ability to quantify and separate trapped charge components is provided.

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. patent applicationSer. No. 13/345,050, filed Jan. 6, 2012, which claims the benefit ofU.S. Provisional Application Ser. No. 61/430,446, filed Jan. 6, 2011,which is hereby incorporated by reference herein in its entirety,including any figures, tables, or drawings.

The subject invention was made with government support from the ArmyResearch Laboratory under Cooperative Agreement Number W911NF-05-2-0038.The government has certain rights to this invention.

BACKGROUND OF INVENTION

Corona ions may be generated from air by the application of high voltageto fine wires and sharp electrode tips (G. W. Trichel, Physical Review54, 1078 (1938); R. Williams and A. Willis, J. Appl. Phys. 39, 3731-3736(1968); M. Goldman, A. Goldman, and R. S. Sigmond, Pure & Appl. Chem.57, 1353-1362 (1985); M. Pavlik and J. D. Skalny, Rapid Communicationsin Mass Spectrometry 11, 1757-1766 (1997)). The deposition of coronaions has been used for decades to apply electric fields to dielectricsand to other electronic material structures. Such methods avoid thefabrication of electrodes on the material surface. When combined with aKelvin probe (K. Besocke and S. Berger, Rev. Sci. Instrum. 47, 840-842(1976)), this noncontact approach permits the potential of the charged,or biased, surface to be determined. The combination has been used tostudy electronic trapping in materials, mobile ion density, andtransport through dielectric films (R. Williams and A. Willis, J. Appl.Phys. 39, 3731-3736 (1968); G. W. Hughes, R. J. Powell, and M. H. Woods,Appl. Phys. Lett. 29, 377-379 (1976); R. Williams, Journal of VacuumScience & Technology 11, 1025-1027 (1974); R. Williams, Journal ofVacuum Science & Technology 14, 1106-1101 (1977); R. Williams and M. H.Woods, J. Appl. Phys. 44, 1026-1028 (1973); R. Williams and M. H. Woods,Appl. Phys. Lett. 22, 458-459 (1973), R. Williams and M. H. Woods, J.Appl. Phys. 46, 695-698 (1975); M. H. Woods and R. Williams, J. Appl.Phys. 44, 5506-5510 (1973); M. H. Woods and R. Williams, J. Appl. Phys.47, 1082-1089 (1976); P. Edelman, A. M. Hoff, L. Jastrzebski, and J.Lagowski, U.S. Pat. No. 5,773,989, 1998; A. M. Hoff, S. Aravamudhan, A.Isti, and E. I. Oborina, J. Electrochem. Soc. 154, H977-H982 (2007)).For example, tunneling due to substrate emission in oxide films onsilicon can be accomplished by biasing the structures with depositedcorona ions and measuring the resulting potential decay with a Kelvinprobe (Z. A. Weinberg, W. C. Johnson, and M. A. Lampert, J. Appl. Phys.47, 248-255 (1976); Z. A. Weinberg, Solid-State Electron. 20, 11-18(1977); Z. A. Weinberg, J. Appl. Phys. 53, 5052-5056 (1982)). The needfor in-line monitoring and control of manufacturing processes led to theapplication of these methods in the silicon integrated circuits industry(P. Edelman, A. M. Hoff, L. Jastrzebski, and J. Lagowski, U.S. Pat. No.5,773,989, 1998; M. Wilson, J. Lagowski, A. Savtchouk, L. Jastrzebski,and J. D'Amico, in COCOS (Corona Oxide Characterization ofSemiconductor) Metrology: Physical Principles and Applications, SanJose, Calif., 1999 (ASTM); D. K. DeBusk and A. M. Hoff, Solid StateTechnology 42, 67 (1999)).

Corona-Kelvin metrology, C-KM, is now in common use in integratedcircuit manufacturing for noncontact and preparation-freecharacterization of dielectrics on silicon (M. Wilson, D. Marinskiy, A.Byelyayev, J. D'Amico, A. Findlay, P. Edelman, L. Jastrzebski, and J.Lagowski, Trans. ECS 11, 347-361 (2007)). The metrology involves threeelements: (1) placement of a precise amount of electric charge on adielectric surface as ions from a corona discharge in air; (2)monitoring the surface voltage change with a vibrating Kelvin probe; and(3) determination of the semiconductor surface barrier potential,V_(SB), separate from the dielectric potential, V_(OX). In the case ofoxides on SiC, this metrology has been applied to the determination ofthe capacitance-voltage dependence (A. M. Hoff and E. Oborina, inSilicon Carbide and Related Materials 2006, Pts 1 and 2, edited by R. P.Devaty, D. J. Larkin, and S. E. Saddow (2006), p. 1035-1038; A. M. Hoff,E. Oborina, S. E. Saddow, and A. Savtchouk, in Silicon Carbide andRelated Materials 2003, Pts 1 and 2; Vol. 457-460 (2004), p. 1349-1352)and Fowler-Nordheim characteristics (E. I. Oborina, H. Benjamin, and A.M. Hoff, J. Appl. Phys. in press (2009)) of as-grown dielectrics.However, there exists a problem applying Corona-Kelvin metrology tooxides on SiC. In particular, with the application of oxides on SiC,there exists a problem with the third part of the Corona-Kelvinmetrology process. The third element is used to obtain dielectriccharges, Qit, and the dielectric interface trap density, Dit. Thespecific zero value of the surface photovoltage identifies the flat-bandcondition at dielectric-silicon interface, where the flat-band conditionis a reference in calculation of the silicon surface barrier, Vsb, andthe barrier change upon corona charging. Corona charge at flat-bandgives the total dielectric charge, Qtot. With silicon, the surfacephotovoltage can be found fairly easily with the use of a light withphoton energy larger than the silicon energy gap of 1.1 eV, and a photonenergy small enough to not cause any oxide charge changes. The problemwith SiC is that the energy gap is 3 eV. This value is above the bandgap illumination where significant changes would occur to the interfacecharge, Qit, and the dielectric trapped charge, Dit.

Starting from a defined initial condition of a dielectric-semiconductorstructure, the automated sequential accomplishment of elements 1 and 2of the Corona-Kelvin metrology determine the voltage-chargecharacteristics, V-Q, the capacitance-charge characteristics, C-Q, andthe electrical thickness of the dielectric film on the semiconductor (M.Wilson, D. Marinskiy, A. Byelyayev, J. D'Amico, A. Findlay, P. Edelman,L. Jastrzebski, and J. Lagowski, Trans. ECS 11, 347-361 (2007)). Toquantify the dielectric charges and the interface trap density inas-grown dielectric-silicon structures the third element can beimplemented. The V_(SB) value for each quantity of deposited charge onthe surface during the measurement sequence is obtained from thedifference between the total structure voltage determined in the darkand the structure voltage when the material is illuminated to null theband bending at the semiconductor surface. Following each illumination,a relatively short time is required in the silicon to establish thepre-illumination value of the total voltage once the light is turnedoff. Therefore, in a typical sequence of measurements on silicon, wherethe semiconductor is swept from accumulation to depletion, two V-Qcurves are generated that correspond to: A) the dielectric voltageversus density of charge applied, light measurements; and B) the totalvoltage of the structure versus the charge applied, dark measurements.The difference between curves A and B corresponds to the V_(SB)-Qcharacteristic. Further, characteristics A and B intersect at theflatband potential. In the case of the wide band gap material SiC, arecovery time for V_(CPD) comparable to silicon following illuminationis not experimentally observed.

Again, the specific zero value of V_(SB) identifies the flatbandcondition at the dielectric-semiconductor interface. This flatbandcondition is a reference in calculations of the semiconductor spacecharge and the change in V_(SB) induced by charging the dielectricsurface with corona ions. For example, the quantity of corona chargeneeded to achieve flatband starting from the initial charge state of theoxide, gives the total dielectric charge, Q_(TOT) (M. Wilson, J.Lagowski, L. Jastrzebski, A. Savtchouk, and V. Faifer, inCharacterization and Metrology for ULSI Technology; Vol. 550, edited byD. G. Seiler, A. C. Diebold, R. McDonald, W. M. Bullis, P. J. Smith, andE. M. Secula (AIP, 2001), p. 220-225), present in an as-grown film. Inthe case of silicon, V_(SB) is easily driven to zero volts, independentof the charge density on the dielectric surface, using light with photonenergy larger than the silicon energy gap of 1.1 eV, but at the sametime a sufficiently low intensity is used to avoid photo-induced changeof the oxide charge.

Accordingly, there is a need in the art for a method and apparatus fordetermining the interface trap charge and/or interface trap density of asemiconductor-dielectric or semiconductor-oxide interface, for widebandgap semiconductor and/or structures having charge centers (e.g.,defects) that do not depopulate after illuminating and turningillumination off.

BRIEF SUMMARY

Embodiments of the subject invention relate to a method and apparatusfor determining the interface trap charge and/or interface trap densityat a semiconductor-dielectric interface or a semiconductor-oxideinterface. Specific embodiments can determine the interface trap densityin a non-contact manner. A specific embodiment can determine theinterface trap density of SiO₂₋4H—SiC structures. Specific embodimentsof the subject method and apparatus can be used to characterizeinterfaces of any semiconductor-dielectric interfaces where rapidrecovery to pre-illumination potential value after illumination withlight, allowing quick modulation of the contact potential differencevoltage of the structure, is not possible. For cases where rapidrecovery after illumination of the structure is not possible,determination of the surface barrier potential as a function of chargeapplied to the surface needed to obtain the interface trap dependence onthe surface charge is difficult and/or not viable. Semiconductormaterials to which embodiments of the subject method and apparatus canbe applied include, but are not limited to, SiC, GaN, GaAs, and widebandgap semiconductors used in field effect structures. Embodiments ofthe invention can be utilized with semiconductors, for example n-type orp-type, having a range of doping densities, such as, but not limited to,10¹¹/cm³ to 10¹⁸/cm³. Specific embodiments can be utilized with n-typeor p-type semiconductors having doping densities in the range 10¹⁴/cm³to 10¹⁸/cm³.

In accordance with embodiments of the invention, relating to SiC, anapproach to obtain the surface barrier voltage, V_(SB), and itsdependence on the density of applied charge can be utilized thatdetermines the reference flatband voltage, V_(FB), from the V-Qcharacteristic acquired in the dark, using independent determination ofthe semiconductor doping density and the oxide capacitance. Once V_(FB)is determined, the corona-Kelvin procedure may be used to calculate thesurface barrier voltage and the interface trap density spectrum, D_(it)versus surface charge, Q_(C). In addition, the oxide trap charge may bequantitatively characterized as demonstrated from the V_(FB) shiftfollowing high field injection of charges from SiC into the oxide.Noncontact trap charge and interface trap densities can be accomplishedusing this approach for the case of oxide films grown on SiC.

Embodiments can use the first two elements of the Corona-Kelvinmetrology, namely (1) placement of a precise amount of electric chargeon a dielectric surface as ions from a corona discharge in air and (2)monitoring the surface voltage change with a vibrating Kelvin probe, forSiC to measure surface photovoltage for SiC. The flat-band condition canbe determined from the V-Q and C-Q characteristics determined viaelements (1) and (2). Further SiC doping, N_(d), can be determined fromthe V-Q characteristic in deep depletion and the oxide capacitance,C_(ox), can be determined from C-Q saturation in deep accumulation. OnceCox and Nd are known, the flat-band capacitance can be identified on C-Qcharacteristics. This can then lead to a corresponding corona chargethat gives the total oxide charge, Q_(tot). The corresponding voltagegives the flat-band voltage, V_(FB). Once this is completed, thestandard Corona-Kelvin procedure can be used to calculate the surfacebarrier, V_(sb), and the D_(it). The Q_(it) can then be found by usingthe V_(FB) shift after high field corona pushing that causes injectionof charges from SiC into the oxide.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 shows light modulation of the V_(CPD) of silicon and SiCoxide-semiconductor structures demonstrating poor recovery to initialstate V_(CPD) following illumination in the case of SiC.

FIG. 2 shows an equivalent circuit of oxide semiconductor systemincluding capacitance associated with interface traps.

FIG. 3 shows non-contact C-V characteristics, where CV1 data correspondsto moderate stress (dark), CV2 data corresponds to moderate stress(illuminated), and CV3 data corresponds to high field stressing toinduce interface trapping and flatband shift.

FIG. 4 shows V-Q characteristics measured after moderate stress andafter high field stress, to increase the density of charge centers ofthe interface, where the solid line shows calculated V-Q characteristicsfrom measured C_(OX) and aligned with measured curves at V_(FB)1 andV_(FB)2, respectively.

FIG. 5 shows interface trap density spectra comparing the spectra before(moderate stress) and following (high stress) high field Fowler-Nordheimstress of thermal oxide on n-type 4HSiC.

DETAILED DISCLOSURE

Embodiments of the subject invention relate to a method and apparatusfor determining the interface trap charge and/or interface trap densityat an interface of a semiconductor and dielectric, or oxide. Examples ofstructures with respect to which embodiments of the subject method andapparatus can be applied include, but are not limited to, a dielectricfilm disposed on a semiconductor and an oxide layer disposed on asemiconductor. Specific embodiments can determine the interface trap ina non-contact manner. A specific embodiment can determine the interfacetrap of SiO₂-4H—SiC structures.

In accordance with embodiments of the invention, relating to SiC, anapproach to obtain the surface barrier and its dependence on the densityof applied charge can be utilized that determines the reference flatbandvoltage from the V-Q characteristic acquired in the dark, usingindependent determination of the semiconductor doping density and theoxide capacitance. Once V_(FB) is determined, the corona-Kelvinprocedure may be used to calculate the surface barrier and the interfacetrap density spectrum. In addition, the oxide trap charge may bequantitatively characterized as demonstrated from the V_(FB) shiftfollowing high field injection of charges from SiC into the oxide.Noncontact trap charge and interface trap densities can be accomplishedusing this approach for the case of oxide films grown on SiC.

Embodiments can use the first two elements of the Corona-Kelvinmetrology, namely (1) placement of a precise amount of electric chargeon a dielectric surface as ions from a corona discharge in air and (2)monitoring the surface voltage change with a vibrating Kelvin probe. Theflat-band condition can be determined from the V-Q and C-Qcharacteristics determined via elements (1) and (2). Further SiC doping,N_(d), can be determined from the V-Q characteristic in deep depletionand the oxide capacitance, C_(ox), can be determined from C-Q saturationin deep accumulation. Once C_(ox) and N_(d) are known, the flat-bandcapacitance can be identified on C-Q characteristics. The correspondingvoltage gives the flat-band voltage, V_(FB). Once this is completed, thestandard Corona-Kelvin procedure can be used to calculate the surfacebarrier, V_(sb), and the interface trap density, D_(it).

Procedure for Noncontact D_(it) on Si

Noncontact corona oxide characterization metrology was initiallydeveloped to characterize the oxide integrity of SiO₂—Si structures (M.Wilson, J. Lagowski, A. Savtchouk, L. Jastrzebski, and J. D'Amico, inCOCOS (Corona Oxide Characterization of Semiconductor) Metrology:Physical Principles and Applications, San Jose, Calif., 1999 (ASTM); J.Lagowski, P. Edelman, and M. D. Wilson, U.S. Pat. No. 6,037,797, 2000;J. Lagowski and P. Edelman, in Inst. Phys. Conf. Ser.; Vol. 160, editedby J. Donecker and I. Rechenberg (lop Publishing Ltd, 1997), p. 133-144)and later was successfully applied to advanced dielectrics on Sisubstrates (M. Wilson, D. Marinskiy, A. Byelyayev, J. D'Amico, A.Findlay, P. Edelman, L. Jastrzebski, and J. Lagowski, Trans. ECS 11,347-361 (2007); P. Edelman, A. Savtchouk, M. Wilson, J. D'Amico, J. N.Kochey, D. Marinskiy, and J. Lagowski, Eur. Phys. J.-Appl. Phys 27,495-498 (2004)). As an in-line metrology, the incorporatedinstrumentation makes measurements in order to calibrate and quantifyboth the deposited charge density and the voltage determined with theKelvin method (Semiconductor Diagnostics, Inc. Tampa, Fla., FAaST Tools,http://www.sditampa.com, (2008); N. A. Surplice and R. J. Darcy, J.Phys. E-Sci. Inst. 3, 477-482 (1970)). User-specified quanta of coronacharge from air are deposited on the dielectric surface to provide biasand the response of the structure is determined from measurement of thecontact potential difference voltage, V_(CPD). For an oxide-siliconstructure, the V_(CPD) value includes three components:

V _(CPD)=Φ_(ms) ⁰ +V _(SB) +V _(OX),  (1)

where Φ_(ms) ⁰ is the metal-semiconductor contact potential differencewithout any surface charge. Since, typical calculations determine achange in V_(CPD) with an increment of charging, the first componentdrops from consideration and does not contain information regarding thedielectric. The two remaining components are important to characterizeparameters of the dielectric and only one of them, V_(SB), may bemodulated by illumination with sufficient photon energy, hv≧E_(g), toeffectively eliminate band bending at the semiconductor surface.However, the intensity of this illumination is preferably keptsufficiently low such that the oxide is not damaged or charged by theillumination process. A green light diode with hv=2.36 eV is typicallyadequate for SiO₂—Si structures. Hence the difference in V_(CPD)measured in the dark and under illumination can be used to determine thevalue of V_(SB) from Equation (1) as,

V _(SB) =V _(CPD) ^(Dark) −V _(CPD) ^(Light).  (2)

Placing a controlled quantum of corona charge, ΔQ_(C), on the oxidesurface is equivalent to the application of an electric field valueΔE_(OX)=ΔQ_(C)/∈_(OX)γ₀ on the dielectric and provides a change in thevoltage drop across oxide equal to ΔV_(OX)=ΔQ_(C)/C_(OX). Chargeconservation requires that the charge deposited on the dielectricsurface be balanced by charges in the semiconductor. This image chargeis opposite in polarity and includes the semiconductor space chargeΔQ_(SC) and charge trapped at the interface, □ΔQ_(it):

ΔQ _(C)=−(ΔQ _(SC) +ΔQ _(it)).  (3)

According to semiconductor theory, knowledge of the doping density andsurface barrier provides for determination of the space charge density,in coulomb-cm⁻², from (S. M. Sze, Physics of Semiconductor Devices (JohnWiley & Sons, 1969); E. H. Nicollian and J. R. Brews, MOS (Metal OxideSemiconductor) Physics and Technology (John Wiley & Sons, 1982); E.Arnold, IEEE Trans. Electron Devices 46, 497-503 (1999)):

Q _(SC) =±q(N _(A,D))×L _(D) ×F(V _(SB)),  (4)

where N_(A,D) is the doping concentration, q is the electron charge,L_(D) is the extrinsic Debye length, and F is a unitless function of themeasured surface barrier value. From Equations (3) and (4) the chargetrapped at the interface may be determined from,

|ΔQ _(it) |=|ΔQ _(C) |−|ΔQ _(SC)|.  (5)

The derivative of Equation (5) with respect to V_(SB), divided by theelemental charge, determines the interface trap density and spectrum ofD_(it) over a range of surface barrier values (J. Lagowski, P. Edelman,and M. D. Wilson, U.S. Pat. No. 6,037,797, 2000),

D _(it) =ΔQ _(it)/(q×ΔV _(SB)).  (6)

In silicon, the standard measurement routine includes the sequentialdetermination of V_(CPD) ^(Dark) and V_(CPD) ^(Light) to obtain theV_(SB) value using Equation (2) for each increment of applied coronacharge, ΔQ_(C). As noted, the charge is specified in the measurementroutine and monitored independently by the instrument system for eachdeposition. From the accumulated charge dependence and Equations (2)-(6)the spectrum of D_(it) within the depletion regime of the siliconsemiconductor is determined. In addition, the important reference valueV_(FB), or flatband voltage when the surface barrier is equal to zero isalso obtained from the sequence of charging and dark/light voltagevalues.

Metrology Approach for D_(it) on SiC

The combination of corona charge deposition and the Kelvin method withthe semiconductor physics described above, such as the determination ofthe space charge correspondence to V_(SB) (S. M. Sze, Physics ofSemiconductor Devices (John Wiley & Sons, 1969); E. H. Nicollian and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology (JohnWiley & Sons, 1982); E. Arnold, IEEE Trans. Electron Devices 46, 497-503(1999)), can be applied to any dielectric-semiconductor system. However,practice of the method described by Lagowski (J. Lagowski, P. Edelman,and M. D. Wilson, U.S. Pat. No. 6,037,797, 2000), which directlydetermines V_(SB) and V_(OX) for each increment of deposited coronacharge, cannot be utilized in the case of semiconductor-dielectricinterfaces that do not rapidly recover after illumination with light,such as interfaces between dielectrics and SiC. The significanttechnological issue with certain semiconductors, such as SiC, with ahigh concentration of electrical defects present in the semiconductormaterial (O. Kordina, J. P. Bergman, C. Hallin, and E. Janzen, Appl.Phys. Lett. 69, 679-681 (1996); T. Kimoto, K. Danno, and J. Suda, Phys.Status Solidi B-Basic Solid State Phys. 245, 1327-1336 (2008); T.Hiyoshi and T. Kimoto, Appl. Phys. Express 2, 0411011-0411013 (2009); P.B. Klein, J. Appl. Phys. 103, 0337021-03370214 (2008); C. J. Cochrane,P. M. Lenahan, and A. J. Lelis, J. Appl. Phys. 105, 0645021-0645027(2009)) is that the high concentration of electrical defects imposestrapping and emission time constants in a manner that prohibits quickmodulation of V_(CPD) with light, from an initial value to a value underillumination and then a quick return to the initial value when the lightis extinguished. This issue is demonstrated by FIG. 1, where for n-typeSi and SiC, V_(CPD) is modulated with light from an initial value in thedark to a value under illumination. When the light is turned off, the Sivalue of V_(CPD) recovers to the pre-illumination value in a fraction ofa second. This behavior is not observed with SiC where 20 seconds afterthe illumination has ceased the V_(CPD) value has recovered to less than10% of the change in voltage obtained at the onset of illumination.Indicators of high density of defects in SiC materials are provided bythe extremely low minority carrier lifetime (O. Kordina, J. P. Bergman,C. Hallin, and E. Janzen, Appl. Phys. Lett. 69, 679-681 (1996)), deeptrap states identified by transient spectroscopy (T. Kimoto, K. Danno,and J. Suda, Phys. Status Solidi B-Basic Solid State Phys. 245,1327-1336 (2008)), and spin dependent recombination spectroscopy (C. J.Cochrane, P. M. Lenahan, and A. J. Lelis, J. Appl. Phys. 105,0645021-0645027 (2009)). The light pulse used to flatten the energybands at the SiC surface also likely fills many of these trap states.When the light is removed the emission rates are apparently lowindicating a long time would be required to re-establish the net spacecharge that would yield the pre-illumination value of V_(CPD).

For the case of SiC substrates, and other materials, such as developingmaterials, that may have similar defects, embodiments of the subjectmethod and apparatus can be utilized. With respect to a specificembodiment, only one V_(CPD)-Q_(C) characteristic is obtained in thedark. A sequence can be performed as a sweep from a V_(CPD) value wherethe semiconductor is in strong accumulation to a V_(CPD) value where thesemiconductor is in depletion. To determine the important flatbandreference value of V_(CPD), the doping level in the semiconductor (A.Savtchouk, E. Oborina, A. M. Hoff, and J. Lagowski, in Silicon Carbideand Related Materials 2003, Pts 1 and 2; Vol. 457-460 (2004), p.755-758) and the oxide capacitance value determined from the V-Qcharacteristic in accumulation can be used.

The equivalent circuit presented in FIG. 2 shows the correspondingvoltage change, ΔV_(CPD), obtained by placing a quantum of coronacharge, ΔQ_(C), on the oxide surface. The ratio of the two measuredquantities ΔV_(CPD)/ΔQ_(C) is the inverse capacitance, C⁻¹ and may berepresented by the equation:

C ⁻¹ =C _(OX) ⁻¹+(C _(SC) +C _(it))⁻¹.  (7)

In an embodiment, an instrument system can determine V_(CPD) with aprecision of less than 0.1 mV. Each charge increment can be monitoredduring a measurement sequence relative to a target value specified bythe user. In various embodiments, each charge increment can be unique,one or more charge increments can be the same with one or more chargeincrements being different, or all of the charge increments can be thesame For example, a target charge increment of 1×10¹¹ q/cm² may be usedand the consistency of this value measured by the instrument during eachion deposition interval. Multiplication of Equation (7) by Q_(C) yieldsthe total V_(CPD) of the structure where the first term on the rightprovides V_(OX) and the second V_(SB). In line with FIG. 2 and Equation(7) the capacitance under strong accumulation, when V_(SB)→0V becomespractically equal to C_(OX).

A straight line may be defined in V-Q space with slope equal to C_(OX)⁻¹ and determined experimentally from measurement of the derivative ofV_(CPD) versus Q_(C) in accumulation. Accumulation can be confirmed in aspecific embodiment, by observing that the ratio ΔV_(CPD)/ΔQ_(C) remainssubstantially constant after placement of two or more additionalincremental charge is deposited having an opposite sign as the initialcharge deposited. This ratio will be substantially the same if ΔV_(CPD)is the same for two deposits of charge where the amount of chargedeposited is the same. In specific embodiments, the ratios can beconsidered the same or substantially the same if ratios are within 10%,5%, 4%, 3%, and/or 2% of each other. The intersection of this line andthe V_(CPD)-Q_(C) characteristic acquired in the dark occurs whenV_(SB)=0V as predicted from FIG. 2 and Equation (7). At thisintersection, the needed reference for changes in oxide voltage andtotal voltage of the structure as a function of applied charge can beestablished.

The total capacitance dependence of the structure on deposited chargecan be obtained from differentiation of the V_(CPD)-Q_(C) characteristicacquired. According to ⁴⁰ the flatband capacitance C_(FB) is obtainedfrom:

$\begin{matrix}{C_{FB} = \frac{C_{OX}C_{S}}{C_{OX} + C_{S}}} & (8)\end{matrix}$

where C_(OX) was just experimentally determined. The semiconductorcapacitance, C_(S), at flatband condition is determined from,

$\begin{matrix}{C_{S} = \frac{ɛ_{S}ɛ_{0}}{L_{D}}} & (9)\end{matrix}$

where ∈_(S) and ∈₀ are the relative and vacuum permittivity values andL_(D) is the extrinsic Debye length of the semiconductor given by,

L _(D) =[kT∈ _(S)∈₀ /q ² N _(D/A)]^(1/2),  (10),

where N_(D/A) is the semiconductor doping density and (kT/q) the thermalvoltage. The doping density value for the calculation in Equation 10 canbe provided, assumed, measured, or determined independently by anappropriate method such as a noncontact method demonstrated for SiC (A.Savtchouk, E. Oborina, A. M. Hoff, and J. Lagowski, in Silicon Carbideand Related Materials 2003, Pts 1 and 2; Vol. 457-460 (2004), p.755-758). Also, for the case of a wafer that is non-uniformly doped withdepth, such as a substrate doped to a density N_(sub) coated by anepitaxial layer of doping N_(epi), determination of the flatband voltagecan be performed with respect to the built-in barrier and depends on theratio (N_(sub)/N_(em)) as discussed in (D. K. Schroder, SemiconductorMaterial and Device Characterization, 2 ed. (John Wiley & Sons, NewYork, 1998)). An extra (V-Q)_(acc) measurement under illumination may beperformed to increase the accuracy of C_(OX) extraction especially ifthere is good reason to believe that extra space charge may exist in thestructure under investigation. This situation may occur at the interfacebetween the substrate and an epitaxial film. For the case of n-typeepitaxial SiC on a heavily doped n-type SiC substrate no difference wasobserved for C_(OX) measured either in the dark or under illumination.

Once C_(FB) has been determined with Equation (8), the correspondingQ_(C) value may be identified on the C-Q_(C) curve and from thisV_(CPD)=V_(FB) is determined from the V_(CPD)-Q_(C) characteristic. Thisreference point establishes a correspondence between applied charge andthe changes induced in the oxide potential and total V_(CPD) values byQ_(C) deposition. Equation (2) may then be applied to determine theV_(SB) response to each increment of deposited corona charge relative tothis reference value. The V_(SB)-Q_(C) dependence thus obtained issufficient to proceed to calculations of D_(it) and its spectrum asdescribed by Equations (2)-(6). Hence, an embodiment of the subjectmethod can completely avoid the use of light modulation of V_(CPD) todetermine V_(SB).

Example Application of Noncontact D_(it) to Thermal Oxide-SiC Structures

A commercial metrology instrument system, FAaST-200 (SemiconductorDiagnostics, Inc. Tampa, Fla., FAaST Tools, http://www.sditampa.com,(2008)), designed for monitoring silicon IC MOS manufacture, wasmodified to realize an embodiment of the subject method and anembodiment of the subject apparatus. For enhanced accuracy of C_(OX)determination, a UV light emitting diode, with hv=3.33 eV, was used toperform measurements of the dielectric capacitance with thesemiconductor in accumulation. Possible charging and other deleteriouseffects that might result from use of this illuminator were carefullyevaluated using precision charging and voltage determination inconjunction with the LED illumination. Oxidized Si and SiC wafers werecoated with blanket corona charge to achieve a deep accumulationcondition in the semiconductor followed by high density contactpotential difference V_(CPD) mapping (P. Edelman, A. M. Hoff, L.Jastrzebski, and J. Lagowski, U.S. Pat. No. 5,773,989, 1998; A. M. Hoffand D. K. DeBusk, in PV199916: Analytical and Diagnostic Techniques forSemiconductor Materials, Devices, and Processes, edited by B. Kolbesen,C. Claeys, P. Stallhofer, F. Tardif, J. Benton, T. Shaffner, D.Schroeder, S. Kishino, and P. Rai-Choudhury (Electrochemical Society,1999)). The structure was illuminated with the LED UV light at 9specific measurement locations on each wafer for 30 seconds. Followingthis light exposure, another V_(CPD) high density, 6000 point, map wasacquired on each sample. From FIG. 2, any charge trapping caused by theillumination in the dielectric or at the interface would be observedfrom a difference in V_(CPD) acquired before and after illuminationcompared to regions that were not illuminated. In all samples andlocations, no differences were observed in the map distributions or intheir average voltage values before and after illumination. In otherwords, the 9 illuminated locations were indistinguishable from theremaining oxide area on the wafer surfaces in the high density V_(CPD)maps. This result suggests that this particular UV source configurationdoes not induce charge leakage through or trapping in oxide films on Sior SiC.

As an example of the new measurement procedure to determine a D_(it)spectrum, an 8° off axis, n-type, 4H—SiC 76.2 mm diameter wafer wasthermally oxidized at temperature above 1100° C. and annealed in an NOambient also at a temperature not below 1100° C. The average doping ofthis epitaxial film was N_(D)=5×10¹⁵ cm⁻³. Voltage-charge,V_(CPD)-Q_(C), characteristics were acquired by placing an initial doseof positive charge on the oxide surface adequate to accumulate majoritycharge in the semiconductor at each measurement site across the wafer.This was followed by the addition of increments of negative coronacharge to sweep the surface barrier toward depletion.

Example results of C-V plots, derived from the V_(CPD)-Q_(C)characteristics obtained, are presented in FIG. 3. Note that all curveswere obtained at the same location on the wafer and are representativeof results from multiple locations on the wafer. The first two curves,CV1 and CV2, in FIG. 3 were acquired after moderate stress inaccumulation and relate to measurements performed in the dark, CV1, andunder illumination, CV2. The oxide capacitance was found to beC_(OX)=6.67×10⁻⁸ F/cm² in agreement with both CV1 and CV2characteristics. The agreement of these two characteristics alsosuggests that the determination of C_(OX) using illumination is notrequired for typical substrates. One more curve, CV3, was measured afterFowler-Nordheim tunneling induced by a high positive potentialdielectric stress for several minutes. The effect of such stress, andthe resulting fluence of tunneling charge from the substrate to thesurface, on the dielectric structure and interface properties is shownby characteristic CV3 in FIG. 3. The latter exhibits a significantlylarger voltage transition range from accumulation to depletion, termedstretch-out, compared to the initial characteristic, CV1. The flatbandcapacitance was calculated according to Equation (8) as C_(FB)=4.75×10⁻⁸F/cm².

The V_(CPD)-Q_(C) characteristics used to produce the C-V curves in FIG.3 are shown in FIG. 4, where the solid line, derived from C_(OX)measurement, represents the V_(OX)-Q_(C) characteristic as describedabove that intersects each of the respective V_(CPD)-Q_(C) curvesacquired in the dark at the respective flatband voltage points. Thesetwo characteristics, 1 and 2, relate to the oxide-SiC structure at agiven wafer location following moderate and high stress in sequence.From this data, where Q_(C) is the controlled parameter, the surfacebarrier voltage is determined from the difference between theV_(CPD)-Q_(C) and V_(OX)-Q_(C) curve for each condition and thecorresponding D_(it) spectra were calculated according to Equation (6)and are shown in FIG. 5. The effect of Fowler-Nordheim current stress,the high field stress condition, on the D_(it) spectrum is to increasethe trap density in depletion and shift the spectrum toward theconduction band edge above the reference V_(SB)=0 value.

As shown in FIG. 3 the heavy stress in accumulation leads to a flatbandvoltage shift, ΔV_(FB)=4.3V. The added charge in the dielectric leadingto the ΔV_(FB) observed represents a combination of injected charge bothtrapped in the oxide and in interface states. This effective combinedtrapped charge is estimated as: ΔQ_(t) ^(ef)=ΔV_(FB)×C_(OX)=2.87×10⁻⁷C/cm². Note that the difference in trapped charge may be easilydetermined using FIG. 4 as the difference in Q_(C) between the twoV_(FB), intersection points. The charge portion trapped at theinterface, ΔQ_(it) may be calculated from Equation (5) and is a measureof the charge required to sweep the C-V characteristic from maximum tominimum capacitance values. In this manner, the difference in Q_(it)between CV1 and CV3 of FIG. 3 was determined to be ΔQ_(it)=1.22×10⁻⁷C/cm². The effective charge trapped in the oxide by the stress processmay be calculated as:

ΔQ _(t)=(ΔQ _(t) ^(cf) −ΔQ _(it))=1.65·10⁻⁷ C/cm²  (11).

Therefore, useful information may be derived from this approach thatpermits separation of charge density trapped either at the interface orin the oxide. This is of particular importance in the case of SiC wherecharge trapping near the interface is known to cause variations inthreshold voltage control of transistors (A. J. Lelis, D. Habersat, R.Green, A. Ogunniyi, M. Gurfinkel, J. Suchle, and N. Goldsman, IEEETrans. Electron Devices 55, 1835-1840 (2008)).

Accordingly, this example demonstrates a noncontact method to determinethe surface barrier dependence on the control parameter, depositedcorona charge or Q_(C), for gateless oxide-semiconductor structures onn-type 4H—SiC. The approach does not depend on determination of thesurface barrier values from modulation of the surface band bending inthe semiconductor with light. Such V_(SB) determination was shown to benot suitable for SiC. Embodiments of the subject method can be appliedto other similar wide band gap semiconductors that have comparablepopulations of crystalline defects and deep traps. Embodiments of themethod establish a correspondence between the respective responses ofV_(CPD) and V_(OX) to deposited charge. The intersection of the twocurves is obtained at the flatband voltage, extracted from calculationof the flatband capacitance and the associated Q_(C) at V_(FB). Examplesof this approach were used to determine the D_(it) spectral distributionversus V_(SB) for thermal oxide grown on n-type 4H—SiC. Defects wereinduced in the band gap by high field stressing of the oxide in theFowler-Nordheim regime using deposited corona charge. In addition, thecombination of noncontact C-V and D_(it) measurements provides anability to separate the amount of charge trapped in the oxide and at theinterface. The method may be applied to as-grown dielectric films andmay be used as an in-line monitoring metrology for improvement of SiCoxide growth and annealing processes and in SiC MOS manufacturing.

Specific Embodiments

A specific embodiment 1 relates to a method of determining an interfacetrap density at an interface between a semiconductor and a dielectric oroxide layer disposed on a surface of the semiconductor, comprising:

placing an initial electric charge on at least a portion of a surface ofa dielectric layer disposed on a semiconductor, wherein placing theinitial electric charge on the surface of the dielectric layer createsan accumulation state in the semiconductor, wherein placing the initialcharge on the surface of the dielectric layer results in an electriccharge, Q_(C), on the surface of the dielectric layer,

placing at least two increments of additional electric charge on theportion of the surface of the dielectric layer, wherein each of the atleast two increments of additional electric charge have the oppositesign as the initial electric charge, wherein after placement of the atleast two increments of additional electric charge on the at least aportion of the surface of the dielectric layer the semiconductor is indepletion, wherein the electric charge, Q_(C), changes with theplacement of each of the at least two increments of additional electriccharge,

measuring a corresponding value of a contact potential differencevoltage, V_(CPD), after placement of each of the at least two incrementsof additional electric charge on the at least a portion of the surfaceof the dielectric layer, wherein each measured value of the contactpotential difference, V_(CPD), corresponds to a value of electriccharge, Q_(C), on the surface of the dielectric layer,

determining a dielectric capacitance, C_(OX), value of the dielectriclayer while the semiconductor is in accumulation from the measuredcontact potential difference voltage, V_(CPD), values and correspondingelectric charge, Q_(C), values, and values of the at least twoincrements of additional electric charge,

determining a flat band voltage value of the contact potentialdifference voltage (V_(CPD))) from a doping level in the semiconductorand the dielectric capacitance value, C_(OX),

deriving a straight line, wherein a slope of the straight line is aninverse of the dielectric capacitance value, C_(OX), such that thestraight line intersects a V_(CPD)-Q_(C) curve based on the measuredcontact potential difference voltage values, V_(CPD), and correspondingelectric charge values, Q_(C), at the flatband voltage, V_(FB),

determining one or more surface barrier voltage values, V_(SB), whereinthe surface barrier voltage value, V_(SB), is a difference between thecontact potential difference voltage, V_(CPD), on the V_(CPD)-Q_(C)curve at the corresponding electric charge, Q_(C), and a voltage value,V_(OX), on the straight line at the corresponding electric charge,Q_(C), and

determining one or more interface trap densities, D_(it), for acorresponding one or more electric charge values, Q_(C), from thecorresponding one or more electric charge values, Q_(C), thecorresponding surface barrier voltage values, V_(SB), the doping levelin the semiconductor, and an extrinsic Debye length, L_(D), for thesemiconductor.

Preferably the method of embodiment 1 is carried out such that thestructure is not exposed to light in such a way as to fill the interfacetrap or other centers during the method.

The method of embodiment 1 can utilize an n-type semiconductor, suchthat the initial electric charge is a positive electric charge and theat least two increments of additional electric charge are negativeelectric charge.

Alternatively, the method of embodiment 1 can utilize a p-typesemiconductor, such that the initial electric charge is a negativeelectric charge and the at least two increments of additional electriccharge are positive electric charge.

In a further specific implementation of embodiment 1, determining thedielectric capacitance value, C_(OX), can involve finding a slope ofV_(CPD) versus Q_(C) while the semiconductor is in accumulation. In aspecific embodiment, the slope of V_(CPD) versus Q_(C) while thesemiconductor is in accumulation is the inverse of the dielectriccapacitance value C_(OX).

A further specific implementation of embodiment 1 can involve measuringa value of the V_(CPD) before placement of the at least two incrementsof additional electric charge.

In a further specific implementation of embodiment 1, determining theflat band voltage, V_(FB), comprises determining a flat bandcapacitance, C_(FB), from the relationship

${C_{FB} = \frac{C_{OX}C_{S}}{C_{OX} + C_{S}}},$

where C_(S) is a semiconductor capacitance,

where C_(S) is a function of the doping level in the semiconductor andthe contact potential difference voltage, V_(CPD), and

determining the flat band voltage, V_(FB), that corresponds to the flatband capacitance, C_(FB), from the measured contact potential differencevoltage values, V_(CPD), and corresponding electric charge values,Q_(C).

In a further specific implementation of embodiment 1, determining one ormore interface trap densities, D_(it), involves determining at least oneinterface trap density, D_(it), corresponding to an electric charge,Q_(C), having a corresponding contact potential difference voltagevalue, V_(CPD), greater than the flat band voltage, V_(FB). In analternative implementation of embodiment 1, determining one or moreinterface trap densities, D_(it), involves determining at least oneinterface trap density, D_(a), corresponding to an electric charge,Q_(C), having a corresponding contact potential difference voltagevalue, V_(CPD), less than the flat band voltage, V_(FB).

Specific embodiment 2 relates to a method of determining an interfacetrap charge at an interface between a semiconductor and a dielectriclayer disposed on a surface of the semiconductor, comprising:

placing an initial electric charge on at least a portion of a surface ofa dielectric layer disposed on a semiconductor, wherein placing theinitial electric charge on the surface of the dielectric layer createsan accumulation state in the semiconductor, wherein placing the initialcharge on the surface of the dielectric layer results in an electriccharge, Q_(C), on the surface of the dielectric layer,

placing at least two increments of additional electric charge on theportion of the surface of the dielectric layer, wherein each of the atleast two increments of additional electric charge have the oppositesign as the initial electric charge, wherein after placement of the atleast two increments of additional electric charge on the at least aportion of the surface of the dielectric layer the semiconductor is indepletion, wherein the electric charge, Q_(C), changes with theplacement of each of the at least two increments of additional electriccharge,

measuring a corresponding value of a contact potential differencevoltage, V_(CPD), after placement of each of the at least two incrementsof additional electric charge on the at least a portion of the surfaceof the dielectric layer, wherein each measured value of the contactpotential difference, V_(CPD), corresponds to a value of electriccharge, Q_(C), on the surface of the dielectric layer,

determining a dielectric capacitance, C_(OX), value of the dielectriclayer while the semiconductor is in accumulation from the measuredcontact potential difference voltage, V_(CPD), values and correspondingelectric charge, QC, values, and values of the at least two incrementsof additional electric charge,

determining a flat band voltage value of the contact potentialdifference voltage (V_(CPD)) from a doping level in the semiconductorand the dielectric capacitance value, C_(OX),

deriving a straight line, wherein a slope of the straight line is aninverse of the dielectric capacitance value, C_(OX), such that thestraight line intersects a V_(CPD)-Q_(C) curve based on the measuredcontact potential difference voltage values, V_(CPD), and correspondingelectric charge values, Q_(C), at the flatband voltage, V_(FB),

determining one or more surface barrier voltage values, V_(SB), whereinthe surface barrier voltage value, V_(SB), is a difference between thecontact potential difference voltage, V_(CPD), on the V_(CPD)-Q_(C)curve at the corresponding electric charge, Q_(C), and a voltage value,V_(OX), on the straight line at the corresponding electric charge,Q_(C), and

determining one or more interface trap charge values, Q_(it), for acorresponding one or more electric charge values, Q_(C), from thecorresponding one or more electric charge values, Q_(C), thecorresponding surface barrier voltage values, V_(SB), the doping levelin the semiconductor, and an extrinsic Debye length, L_(D), for thesemiconductor.

Aspects of the invention, such as control of the charge depositing andvoltage measuring apparatus, may be described in the general context ofcomputer-executable instructions, such as program modules, beingexecuted by a computer. Generally, program modules include routines,programs, objects, components, data structures, etc., that performparticular tasks or implement particular abstract data types. Moreover,those skilled in the art will appreciate that the invention may bepracticed with a variety of computer-system configurations, includingmultiprocessor systems, microprocessor-based or programmable-consumerelectronics, minicomputers, mainframe computers, and the like. Anynumber of computer-systems and computer networks are acceptable for usewith the present invention.

Specific hardware devices, programming languages, components, processes,protocols, and numerous details including operating environments and thelike are set forth to provide a thorough understanding of the presentinvention. In other instances, structures, devices, and processes areshown in block-diagram form, rather than in detail, to avoid obscuringthe present invention. But an ordinary-skilled artisan would understandthat the present invention may be practiced without these specificdetails. Computer systems, servers, work stations, and other machinesmay be connected to one another across a communication medium including,for example, a network or networks.

As one skilled in the art will appreciate, embodiments of the presentinvention may be embodied as, among other things: a method, system, orcomputer-program product. Accordingly, the embodiments may take the formof a hardware embodiment, a software embodiment, or an embodimentcombining software and hardware. In an embodiment, the present inventiontakes the form of a computer-program product that includescomputer-useable instructions embodied on one or more computer-readablemedia.

Computer-readable media include both volatile and nonvolatile media,removable and nonremovable media, and contemplate media readable by adatabase, a switch, and various other network devices. By way ofexample, and not limitation, computer-readable media comprise mediaimplemented in any method or technology for storing information.Examples of stored information include computer-useable instructions,data structures, program modules, and other data representations. Mediaexamples include, but are not limited to, information-delivery media,RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM,digital versatile discs (DVD), holographic media or other optical discstorage, magnetic cassettes, magnetic tape, magnetic disk storage, andother magnetic storage devices. These technologies can store datamomentarily, temporarily, or permanently. The invention may be practicedin distributed-computing environments where tasks are performed byremote-processing devices that are linked through a communicationsnetwork. In a distributed-computing environment, program modules may belocated in both local and remote computer-storage media including memorystorage devices. The computer-useable instructions form an interface toallow a computer to react according to a source of input. Theinstructions cooperate with other code segments to initiate a variety oftasks in response to data received in conjunction with the source of thereceived data. The present invention may be practiced in a networkenvironment such as a communications network. Such networks are widelyused to connect various types of network elements, such as routers,servers, gateways, and so forth. Further, the invention may be practicedin a multi-network environment having various, connected public and/orprivate networks. Communication between network elements may be wirelessor wireline (wired). As will be appreciated by those skilled in the art,communication networks may take several different forms and may useseveral different communication protocols. The present invention is notlimited by the forms and communication protocols described herein.

All patents, patent applications, provisional applications, andpublications referred to or cited herein are incorporated by referencein their entirety, including all figures and tables, to the extent theyare not inconsistent with the explicit teachings of this specification.

It should be understood that the examples and embodiments describedherein are for illustrative purposes only and that various modificationsor changes in light thereof will be suggested to persons skilled in theart and are to be included within the spirit and purview of thisapplication.

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1. A method of determining an interface trap density at an interfacebetween a semiconductor and a dielectric or oxide layer disposed on asurface of the semiconductor, comprising: placing an initial electriccharge on at least a portion of a surface of a dielectric or oxide layerdisposed on a semiconductor, wherein placing the initial electric chargeon the surface of the dielectric or oxide layer creates an accumulationstate in the semiconductor, wherein placing the initial charge on thesurface of the dielectric or oxide layer results in an electric charge,Q_(C), on the surface of the dielectric or oxide layer, placing at leasttwo increments of additional electric charge on the at least a portionof the surface of the dielectric or oxide layer, wherein each of the atleast two increments of additional electric charge have an opposite signas the initial electric charge, wherein after placement of the at leasttwo increments of additional electric charge on the at least a portionof the surface of the dielectric layer the semiconductor is indepletion, wherein the electric charge, Q_(C), changes with theplacement of each of the at least two increments of additional electriccharge, measuring a corresponding value of a contact potentialdifference voltage, V_(CPD), after placement of each of the at least twoincrements of additional electric charge on the at least a portion ofthe surface of the dielectric layer, wherein each measured value of thecontact potential difference, V_(CPD), corresponds to a value ofelectric charge, Q_(C), on the surface of the dielectric layer,determining a dielectric capacitance, C_(OX), value of the dielectriclayer while the semiconductor is in accumulation from the measuredcontact potential difference voltage, V_(CPD), values and correspondingelectric charge, Q_(C), values, and values of the at least twoincrements of additional electric charge, determining a flat bandvoltage, V_(FB), of the contact potential difference voltage, V_(CPD),from a doping level in the semiconductor and the dielectric capacitancevalue, C_(OX), determining one or more surface barrier voltage values,V_(SB), wherein the surface barrier voltage value, V_(SB), is adifference between the contact potential difference voltage, V_(CPD), ona V_(CPD)-Q_(C) curve at the corresponding electric charge, Q_(C), and avoltage value, V_(OX), on a straight line at the corresponding electriccharge, Q_(C), wherein the line has a slope that is an inverse of thedielectric capacitance value, C_(OX), and the line intersects theV_(CPD)-Q_(C) curve based on the measured contact potential differencevoltage values, V_(CPD), and corresponding electric charge values,Q_(C), at the flatband voltage, V_(FB), and determining one or moreinterface trap densities, D_(it), for a corresponding one or moreelectric charge values, Q_(C), from the corresponding one or moreelectric charge values, Q_(C), the corresponding surface barrier voltagevalues, V_(SB), the doping level in the semiconductor, and an extrinsicDebye length, L_(D), for the semiconductor.
 2. The method according toclaim 1, wherein the semiconductor is an n-type semiconductor, whereinthe initial electric charge is a positive electric charge, wherein theat least two increments of additional electric charge are negativeelectric charge.
 3. The method according to claim 1, wherein thesemiconductor is a p-type semiconductor, wherein the initial electriccharge is a negative electric charge, wherein the at least twoincrements of additional electric charge are positive electric charge.4. The method according to claim 1, wherein determining the dielectriccapacitance value, C_(OX), comprises finding a slope of V_(CPD) versusQ_(C) while the semiconductor is in accumulation.
 5. The methodaccording to claim 4, wherein the semiconductor is in accumulation whena first ratio of a change in the measured contact potential differencevoltage, V_(CPD), from before placing a first of the at least twoincrements of additional electric charge and after placing the first ofthe at least two increments of additional electric charge to a value ofthe first of the at least two increments of additional electric chargeis the same as a second ratio of a change in the measured contactpotential difference voltage, V_(CPD), from before placing a second ofthe at least two increments of additional electric charge and afterplacing the second of the at least two increments of additional electriccharge to a value of the second of the at least two increments ofadditional electric charge.
 6. The method according to claim 5, whereinthe first ratio is the same as the second ratio when the second ratio iswithin 5% of the first ratio.
 7. The method according to claim 1,further comprising measuring a value of the V_(CPD) before placement ofthe at least two increments of additional electric charge.
 8. The methodaccording to claim 1, wherein determining the flat band voltage, V_(FB),comprises determining a flat band capacitance, C_(FB), from therelationship ${C_{FB} = \frac{C_{OX}C_{S}}{C_{OX} + C_{S}}},$ whereC_(S) is a semiconductor capacitance, where C_(S) is a function of thedoping level in the semiconductor and the contact potential differencevoltage, V_(CPD), and determining the flat band voltage, V_(FB), thatcorresponds to the flat band capacitance, C_(FB), from the measuredcontact potential difference voltage values, V_(CPD), and correspondingelectric charge values, Q_(C).
 9. The method according to claim 1,wherein determining one or more interface trap densities, D_(it),comprises determining at least one interface trap density, D_(it),corresponding to an electric charge, Q_(C), having a correspondingcontact potential difference voltage value, V_(CPD), greater than theflat band voltage, V_(FB).
 10. The method according to claim 1, whereindetermining one or more interface trap densities, D_(it), comprisesdetermining at least one interface trap density, D_(it), correspondingto an electric charge, Q_(C), having a corresponding contact potentialdifference voltage value, V_(CPD), less than the flat band voltage,V_(FB).
 11. The method according to claim 4, wherein the slope ofV_(CPD) versus Q_(C) while the semiconductor is in accumulation is theinverse of the dielectric capacitance value C_(OX).
 12. The methodaccording to claim 1, wherein the semiconductor is n-type or p-type,wherein the semiconductor has a doping density in the range of10^(1I)/cm³ to 10¹⁸/cm³.
 13. The method according to claim 1, whereinmeasuring a corresponding value of a contact potential differencevoltage, V_(CPD), after placement of each of the at least two incrementsof additional electric charge on the at least a portion of the surfaceof the dielectric layer is performed in the dark.
 14. The methodaccording to claim 1, further comprising: confirming, after placing theinitial electric charge on the at least a portion of the surface of thedielectric layer disposed on the semiconductor, that the semiconductoris in an accumulation state, wherein confirming that the semiconductoris in an accumulation state comprises: measuring the contact potentialdifference voltage, V_(CPD), before and after placing a first of the atleast two increments of additional electric charge; determining a firstratio of a difference in the contact potential difference voltage,V_(CPD), between before and after placing the first of the at least twoincrements of additional electric charge and a first value of the firstof the at least two increments of additional electric charge; measuringthe contact potential difference voltage, V_(CPD), before and afterplacing a second of the at least two increments of additional electriccharge; determining a second ratio of a difference in the intactpotential difference voltage, V_(CPD), between before and after placingthe second of the at least two increments of additional electric chargeand a second value of the second of the at least two increments ofadditional electric charge; and confirming the second ratio is the sameas the first ratio, wherein when the second ratio is the same as thefirst ratio the semiconductor is in an accumulation state.
 15. Themethod according to claim 14, wherein the second ratio is the same asthe first ratio when the second ratio is within 5% of the first ratio.16. The method according to claim 1, wherein each of the at least twoincrements of additional electric charge are the same.
 17. The methodaccording to claim 1, wherein placing at least two increments ofadditional electric charge on the at least a portion of the surface ofthe dielectric or oxide layer comprises placing one or more of the atleast two increments of additional electric charge on the at least aportion of the surface of the dielectric or oxide layer until thesemiconductor is not in an accumulation state and placing further of theat least two increments of additional electric charge on the at least aportion of the surface of the dielectric or oxide layer until thesemiconductor is in depletion.
 18. A method of determining an interfacetrap charge at an interface between a semiconductor and a dielectric oroxide layer disposed on a surface of the semiconductor, comprising:placing an initial electric charge on at least a portion of a surface ofa dielectric or oxide layer disposed on a semiconductor, wherein placingthe initial electric charge on the surface of the dielectric or oxidelayer creates an accumulation state in the semiconductor, whereinplacing the initial charge on the surface of the dielectric or oxidelayer results in an electric charge, Q_(C), on the surface of thedielectric or oxide layer, placing at least two increments of additionalelectric charge on the portion of the surface of the dielectric or oxidelayer, wherein each of the at least two increments of additionalelectric charge have an opposite sign as the initial electric charge,wherein after placement of the at least two increments of additionalelectric charge on the at least a portion of the surface of thedielectric or oxide layer the semiconductor is in depletion, wherein theelectric charge, Q_(C), changes with the placement of each of the atleast two increments of additional electric charge, measuring acorresponding value of a contact potential difference voltage, V_(CPD),after placement of each of the at least two increments of additionalelectric charge on the at least a portion of the surface of thedielectric or oxide layer, wherein each measured value of the contactpotential difference, V_(CPD), corresponds to a value of electriccharge, Q_(C), on the surface of the dielectric or oxide layer,determining a dielectric capacitance, C_(OX), value of the dielectric oroxide layer while the semiconductor is in accumulation from the measuredcontact potential difference voltage, V_(CPD), values and correspondingelectric charge, Q_(C), values, and values of the at least twoincrements of additional electric charge, determining a flat bandvoltage, V_(FB), of the contact potential difference voltage (V_(CPD))from a doping level in the semiconductor and the dielectric capacitancevalue, C_(OX), wherein the line has a slope that is an inverse of thedielectric capacitance value, C_(OX), and the line intersects theV_(CPD)-Q_(C) curve based on the measured contact potential differencevoltage values, V_(CPD), and corresponding electric charge values,Q_(C), at the flatband voltage, V_(FB), determining one or more surfacebarrier voltage values, V_(SB), wherein the surface barrier voltagevalue, V_(SB), is a difference between the contact potential differencevoltage, V_(CPD), on a V_(CPD)-Q_(C) curve at the corresponding electriccharge, Q_(C), and a voltage value, V_(OX), on a line at thecorresponding electric charge, Q_(C), wherein the line has a slope thatis an inverse of the dielectric capacitance value, C_(OX), and the lineintersects the V_(CPD)-Q_(C) curve based on the measured contactpotential difference voltage values, V_(CPD), and corresponding electriccharge values, Q_(C), at the flatband voltage, V_(FB), and determiningone or more interface trap charge values, Q_(it), for a correspondingone or more electric charge values, Q_(C), from the corresponding one ormore electric charge values, Q_(C), the corresponding surface barriervoltage values, V_(SB), the doping level in the semiconductor, and anextrinsic Debye length, L_(D), for the semiconductor.
 19. The methodaccording to claim 18, wherein measuring a corresponding value of acontact potential difference voltage, V_(CPD), after placement of eachof the at least two increments of additional electric charge on the atleast a portion of the surface of the dielectric layer is performed inthe dark.